Renesas Electronics RX72M MCUs with EtherCAT Slave Controller

Renesas Electronics RX72M MCUs with EtherCAT Slave Controller offer a high-performance, single-chip MCU solution with large memory capacities for industrial equipment. Renesas RX72M components achieve superior performance with 1396 CoreMark capability at 240MHz as measured by EEMBC Benchmarks, with capabilities of both application processing and EtherCAT communication. Combining motor-control MCU with on-chip EtherCAT slave functions allows industrial application developers to reduce their Bill-of-Materials (BOM) and support the miniaturization levels required for industrial equipment design. The low-power design and architecture of the device support a single voltage supply ranging from 2.7V to 3.6V. The various communication interfaces include Ethernet MAC compliant with IEEE 1588, SD host interface, quad SPI, and CAN. Typical applications include AC servo general-purpose inverters, industrial motors, Programmable Logic-Controllers (PLCs), industrial controllers, motion controllers, industrial network equipment, and industrial IoT gateway.

The RX72M MCUs feature a high SRAM capacity of 1MB of SRAM and 4MB of Flash memory. The large-capacity SRAM allows the MCUs to run multiple memory-intensive middleware-systems, like TCP/IP, web servers, and file systems, at high-speed without the use of external memory. It also provides flexibility for the support of future functional expansions, such as OPC United Architecture (OPC UA) with no additional memory required. The on-board flash memory operates as two 2MB banks enabling stable operation of the end equipment. Like executing a program in one flash memory while simultaneously conducting background rewrites in the other flash memory.

Features

32-bit RXv3 CPU core
- 240MHz maximum operating frequency
- Capable of 1396 CoreMark in operation at 240MHz
- Double-precision 64-bit IEEE-754 floating-point
- Collective register bank save function is available
- Supports the memory protection unit (MPU)
- JTAG and FINE (one-line) debugging interfaces
On-chip code flash memory
- Supports versions with up to 4MB of ROM
- No wait cycles at up to 12MHz or when the ROM cache is hit, one-wait state at above 120MHz
- User code is programmable by onboard or off-board programming
- Programming/erasing as Background Operations (BGOs)
- A dual-bank structure allows exchanging the start-up bank
On-chip data flash memory
- 32KB reprogrammable up to 100,000 times
- Programming/erasing as BGOs
On-chip SRAM
- 1MB of SRAM (no wait states)
- 32KB of RAM with ECC (single error correction/double error detection)
- 8KB of standby RAM (backup on deep software standby)
Low-power design and architecture
- Operation from a single 2.7V to 3.6V supply
- RTC is capable of operation from a dedicated power supply
- Four low-power modes
Data transfer
- DMACAa: 8-channels
- DTCb: 1-channel
- EXDMAC: 2-channels
- DMAC for the Ethernet controller: 3-channels
Reset and supply management
- Power-on Reset (POR)
- Low Voltage Detection (LVD) with voltage settings
Clock functions
- External crystal resonator or internal PLL for operation at 8MHz to 24MHz
- PLL for specific purposes
- Internal 240kHz LOCO and HOCO selectable from 16MHz, 18MHz, and 20MHz
- 120kHz clock for the IWDTa
Real-time clock
- Adjustment functions (30 seconds, leap year, and error)
- Real-time clock counting and binary counting modes are selectable
- Time capture function (for capturing times in response to event-signal input)
Independent watchdog timer
- 120kHz clock operation
Useful functions for IEC60730 compliance
- Oscillation-stoppage detection, frequency measurement, CRCA, IWDTa, and self-diagnostic function for the A/D converter
- Register write protection function can protect values in important registers against overwriting

Various communications interfaces
- EtherCAT slave controller (two ports)
- Ethernet MAC compliant with IEEE 1588 (2-channels)
- PHY layer (1-channel) for host/function or OTG controller (1-channel) with full-speed USB 2.0 transfer
- CAN (compliant with ISO11898-1), incorporating 32 mailboxes (up to 3-channels)
- SCIj and SCIh with multiple functionalities (up to 8 channels) choose from among asynchronous mode, clock-synchronous mode, smart-card interface mode, simplified SPI, simplified I²C, and extended serial mode
- SCIi with 16B transmission and reception FIFOs (up to 5 channels)
- I²C bus interface for transfer at up to 1Mbps (3-channels)
- Four-wire QSPI (1-channel) in addition to RSPIc (3-channels)
- Parallel Data Capture (PDC) unit for the CMOS camera interface
- Graphic-LCD controller (GLCDC)
- 2D drawing engine (DRW2D)
- SD host interface (1-channel) with a 1- or 4-bit SD bus for use with SD memory or SDIO
- MMCIF with 1-, 4-, or 8-bit transfer bus width
External address space
- Buses for full-speed data transfer (maximum operating frequency of 80MHz)
- 8 CS areas
- 8-, 16-, or 32-bit bus space is selectable per area
- Independent SDRAM area (128MB)
Up to 29 extended-function timers
- 32-bit GPTW (4 channels)
- 16-bit TPUa (6 channels) and MTU3a (9 channels)
- 8-bit TMRa (4 channels), 16-bit CMT (4 channels), and 32-bit CMTW (2 channels)
Encryption functions (optional)
- AES (key lengths: 128bits, 192bits, and 256bits)
- Trusted Secure IP (TSIP)
Up to 182 pins for general I/O ports
- 5V tolerance, open drain, input pull-up, and switchable driving ability
Operating temperature range
- D-version: -40°C to 85°C
- G-version: -40°C to 105°C
12-bit A/D converter
- Two 12-bit units (8-channels for unit 0; 21-channels for unit 1)
- Self-diagnosis and detection of analog input disconnection
12-bit D/A converter: 2-channels
Temperature sensor for measuring temperature within the chip