SI5396C-A-GM

Skyworks Solutions, Inc.
634-SI5396C-A-GM
SI5396C-A-GM

Mfr.:

Description:
Clock Synthesizer/Jitter Cleaner Dual PLL jitter attenuator with ext crystal: 12-outputs up to 712.5 MHz; integer+fractional synthesi

Datasheet:
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Learn more about Skyworks Solutions, Inc. SI5396C-A-GM

In Stock: 138

Stock:
138 Can Dispatch Immediately
Factory Lead Time:
8 Weeks Estimated factory production time for quantities greater than shown.
Quantities greater than 138 will be subject to minimum order requirements.
Minimum: 1   Multiples: 1
Unit Price:
$-.--
Ext. Price:
$-.--
Est. Tariff:
This Product Ships FREE

Pricing (SGD)

Qty. Unit Price
Ext. Price
$64.65 $64.65
$53.13 $531.30
$50.36 $1,259.00
$48.98 $4,898.00
$48.97 $12,732.20
2,600 Quote

Product Attribute Attribute Value Select Attribute
Skyworks
Product Category: Clock Synthesizer/Jitter Cleaner
RoHS:  
12 Output
720 MHz
CML, HCSL, LVCMOS, LVDS, LVPECL
Crystal, LVCMOS
QFN-64
750 MHz
1.71 V
3.47 V
- 40 C
+ 85 C
Si5396
SMD/SMT
Tray
Brand: Skyworks Solutions, Inc.
Development Kit: SI5396C-A-EVB
Moisture Sensitive: Yes
Operating Supply Current: 150 mA
Pd - Power Dissipation: 1.85 W
Product: Clock Synthesizers
Product Type: Clock Synthesizers / Jitter Cleaners
Factory Pack Quantity: 260
Subcategory: Clock & Timer ICs
Type: Jitter Attenuating Clock
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Attributes selected: 0

Datasheet

Technical Resources

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CNHTS:
8542399000
USHTS:
8542390090
ECCN:
EAR99

Si5397/96 Jitter Attenuators

Skyworks Solutions Inc. Si5397/96 Jitter Attenuators are high-performance jitter-attenuating clock multipliers that integrate multiple any-frequency Digital Signal DSPLLs. The DSPLL generates any-output frequency from any-input frequency. The Si5397 jitter attenuators are 8-output clock multipliers that integrate four any-frequency DSPLLs. The Si5396 jitter attenuators are 4-output with dual DSPLL versions in a smaller package. The Si5397/96 jitter attenuators are based on 4th-generation DSPLL technology and provide any-frequency conversion with a typical jitter performance of 95fs. The DSPLL supports automatic and hitless input clock switching, independent free-run, and holdover modes of operation. 

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